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Refactor AVX code for separate compilation and runtime dispatch
This commit is contained in:
Ken Cooke
parent
08e299f724
commit
3d684dd0e7
2 changed files with 140 additions and 96 deletions
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@ -64,82 +64,7 @@ static const float crossfadeTable[HRTF_BLOCK] = {
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//
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#if defined(_M_IX86) || defined(_M_X64) || defined(__i386__) || defined(__x86_64__)
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#include <immintrin.h> // AVX
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#if 0 // AVX disabled for now..
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// 1 channel input, 4 channel output
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static void FIR_1x4_AVX(float* src, float* dst0, float* dst1, float* dst2, float* dst3, float coef[4][HRTF_TAPS], int numFrames) {
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float* coef0 = coef[0] + HRTF_TAPS - 1; // process backwards
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float* coef1 = coef[1] + HRTF_TAPS - 1;
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float* coef2 = coef[2] + HRTF_TAPS - 1;
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float* coef3 = coef[3] + HRTF_TAPS - 1;
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assert(numFrames % 8 == 0);
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for (int i = 0; i < numFrames; i += 8) {
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__m256 acc0 = _mm256_setzero_ps();
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__m256 acc1 = _mm256_setzero_ps();
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__m256 acc2 = _mm256_setzero_ps();
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__m256 acc3 = _mm256_setzero_ps();
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float* ps = &src[i - HRTF_TAPS + 1]; // process forwards
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assert(HRTF_TAPS % 8 == 0);
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for (int k = 0; k < HRTF_TAPS; k += 8) {
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acc0 = _mm256_add_ps(acc0, _mm256_mul_ps(_mm256_broadcast_ss(&coef0[-k-0]), _mm256_loadu_ps(&ps[k+0])));
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acc1 = _mm256_add_ps(acc1, _mm256_mul_ps(_mm256_broadcast_ss(&coef1[-k-0]), _mm256_loadu_ps(&ps[k+0])));
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acc2 = _mm256_add_ps(acc2, _mm256_mul_ps(_mm256_broadcast_ss(&coef2[-k-0]), _mm256_loadu_ps(&ps[k+0])));
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acc3 = _mm256_add_ps(acc3, _mm256_mul_ps(_mm256_broadcast_ss(&coef3[-k-0]), _mm256_loadu_ps(&ps[k+0])));
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acc0 = _mm256_add_ps(acc0, _mm256_mul_ps(_mm256_broadcast_ss(&coef0[-k-1]), _mm256_loadu_ps(&ps[k+1])));
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acc1 = _mm256_add_ps(acc1, _mm256_mul_ps(_mm256_broadcast_ss(&coef1[-k-1]), _mm256_loadu_ps(&ps[k+1])));
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acc2 = _mm256_add_ps(acc2, _mm256_mul_ps(_mm256_broadcast_ss(&coef2[-k-1]), _mm256_loadu_ps(&ps[k+1])));
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acc3 = _mm256_add_ps(acc3, _mm256_mul_ps(_mm256_broadcast_ss(&coef3[-k-1]), _mm256_loadu_ps(&ps[k+1])));
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acc0 = _mm256_add_ps(acc0, _mm256_mul_ps(_mm256_broadcast_ss(&coef0[-k-2]), _mm256_loadu_ps(&ps[k+2])));
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acc1 = _mm256_add_ps(acc1, _mm256_mul_ps(_mm256_broadcast_ss(&coef1[-k-2]), _mm256_loadu_ps(&ps[k+2])));
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acc2 = _mm256_add_ps(acc2, _mm256_mul_ps(_mm256_broadcast_ss(&coef2[-k-2]), _mm256_loadu_ps(&ps[k+2])));
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acc3 = _mm256_add_ps(acc3, _mm256_mul_ps(_mm256_broadcast_ss(&coef3[-k-2]), _mm256_loadu_ps(&ps[k+2])));
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acc0 = _mm256_add_ps(acc0, _mm256_mul_ps(_mm256_broadcast_ss(&coef0[-k-3]), _mm256_loadu_ps(&ps[k+3])));
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acc1 = _mm256_add_ps(acc1, _mm256_mul_ps(_mm256_broadcast_ss(&coef1[-k-3]), _mm256_loadu_ps(&ps[k+3])));
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acc2 = _mm256_add_ps(acc2, _mm256_mul_ps(_mm256_broadcast_ss(&coef2[-k-3]), _mm256_loadu_ps(&ps[k+3])));
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acc3 = _mm256_add_ps(acc3, _mm256_mul_ps(_mm256_broadcast_ss(&coef3[-k-3]), _mm256_loadu_ps(&ps[k+3])));
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acc0 = _mm256_add_ps(acc0, _mm256_mul_ps(_mm256_broadcast_ss(&coef0[-k-4]), _mm256_loadu_ps(&ps[k+4])));
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acc1 = _mm256_add_ps(acc1, _mm256_mul_ps(_mm256_broadcast_ss(&coef1[-k-4]), _mm256_loadu_ps(&ps[k+4])));
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acc2 = _mm256_add_ps(acc2, _mm256_mul_ps(_mm256_broadcast_ss(&coef2[-k-4]), _mm256_loadu_ps(&ps[k+4])));
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acc3 = _mm256_add_ps(acc3, _mm256_mul_ps(_mm256_broadcast_ss(&coef3[-k-4]), _mm256_loadu_ps(&ps[k+4])));
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acc0 = _mm256_add_ps(acc0, _mm256_mul_ps(_mm256_broadcast_ss(&coef0[-k-5]), _mm256_loadu_ps(&ps[k+5])));
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acc1 = _mm256_add_ps(acc1, _mm256_mul_ps(_mm256_broadcast_ss(&coef1[-k-5]), _mm256_loadu_ps(&ps[k+5])));
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acc2 = _mm256_add_ps(acc2, _mm256_mul_ps(_mm256_broadcast_ss(&coef2[-k-5]), _mm256_loadu_ps(&ps[k+5])));
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acc3 = _mm256_add_ps(acc3, _mm256_mul_ps(_mm256_broadcast_ss(&coef3[-k-5]), _mm256_loadu_ps(&ps[k+5])));
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acc0 = _mm256_add_ps(acc0, _mm256_mul_ps(_mm256_broadcast_ss(&coef0[-k-6]), _mm256_loadu_ps(&ps[k+6])));
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acc1 = _mm256_add_ps(acc1, _mm256_mul_ps(_mm256_broadcast_ss(&coef1[-k-6]), _mm256_loadu_ps(&ps[k+6])));
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acc2 = _mm256_add_ps(acc2, _mm256_mul_ps(_mm256_broadcast_ss(&coef2[-k-6]), _mm256_loadu_ps(&ps[k+6])));
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acc3 = _mm256_add_ps(acc3, _mm256_mul_ps(_mm256_broadcast_ss(&coef3[-k-6]), _mm256_loadu_ps(&ps[k+6])));
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acc0 = _mm256_add_ps(acc0, _mm256_mul_ps(_mm256_broadcast_ss(&coef0[-k-7]), _mm256_loadu_ps(&ps[k+7])));
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acc1 = _mm256_add_ps(acc1, _mm256_mul_ps(_mm256_broadcast_ss(&coef1[-k-7]), _mm256_loadu_ps(&ps[k+7])));
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acc2 = _mm256_add_ps(acc2, _mm256_mul_ps(_mm256_broadcast_ss(&coef2[-k-7]), _mm256_loadu_ps(&ps[k+7])));
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acc3 = _mm256_add_ps(acc3, _mm256_mul_ps(_mm256_broadcast_ss(&coef3[-k-7]), _mm256_loadu_ps(&ps[k+7])));
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}
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_mm256_storeu_ps(&dst0[i], acc0);
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_mm256_storeu_ps(&dst1[i], acc1);
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_mm256_storeu_ps(&dst2[i], acc2);
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_mm256_storeu_ps(&dst3[i], acc3);
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}
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_mm256_zeroupper();
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}
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#endif
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#include <emmintrin.h>
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// 1 channel input, 4 channel output
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static void FIR_1x4_SSE(float* src, float* dst0, float* dst1, float* dst2, float* dst3, float coef[4][HRTF_TAPS], int numFrames) {
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@ -193,23 +118,22 @@ static void FIR_1x4_SSE(float* src, float* dst0, float* dst1, float* dst2, float
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}
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//
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// Runtime CPU dispatch
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// Detect AVX/AVX2 support
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//
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#if 0
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//#if defined(_MSC_VER)
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#if defined(_MSC_VER)
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#include <intrin.h>
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// detect AVX support
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static bool cpuSupportsAVX() {
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static bool cpuSupportsAVX() {
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int info[4];
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int mask = (1<<27) | (1<<28); // OSXSAVE and AVX
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int mask = (1 << 27) | (1 << 28); // OSXSAVE and AVX
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__cpuidex(info, 0x1, 0);
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bool result = false;
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if ((info[2] & mask) == mask) {
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if ((_xgetbv(_XCR_XFEATURE_ENABLED_MASK) & 0x6) == 0x6) {
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result = true;
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}
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@ -217,33 +141,57 @@ static bool cpuSupportsAVX() {
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return result;
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}
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typedef void (*t_FIR_1x4)(float* src, float* dst0, float* dst1, float* dst2, float* dst3, float coef[4][HRTF_TAPS], int numFrames);
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static bool cpuSupportsAVX2() {
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int info[4];
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int mask = (1 << 5); // AVX2
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// dispatch stub
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static void FIR_1x4(float* src, float* dst0, float* dst1, float* dst2, float* dst3, float coef[4][HRTF_TAPS], int numFrames) {
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static t_FIR_1x4 f = cpuSupportsAVX() ? FIR_1x4_AVX : FIR_1x4_SSE; // init on first call
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(*f)(src, dst0, dst1, dst2, dst3, coef, numFrames); // dispatch
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bool result = false;
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if (cpuSupportsAVX()) {
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__cpuidex(info, 0x7, 0);
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if ((info[1] & mask) == mask) {
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result = true;
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}
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}
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return result;
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}
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//#elif defined(__GNU__)
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#elif defined(__GNU__) || defined(__clang__)
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typedef void (*t_FIR_1x4)(float* src, float* dst0, float* dst1, float* dst2, float* dst3, float coef[4][HRTF_TAPS], int numFrames);
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static bool cpuSupportsAVX() {
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return __builtin_cpu_supports("avx");
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}
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// dispatch stub
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static void FIR_1x4(float* src, float* dst0, float* dst1, float* dst2, float* dst3, float coef[4][HRTF_TAPS], int numFrames) {
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static t_FIR_1x4 f = __builtin_cpu_supports("avx") ? FIR_1x4_AVX : FIR_1x4_SSE; // init on first call
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(*f)(src, dst0, dst1, dst2, dst3, coef, numFrames); // dispatch
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static bool cpuSupportsAVX2() {
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return __builtin_cpu_supports("avx2");
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}
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#else
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// always use SSE version
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static void FIR_1x4(float* src, float* dst0, float* dst1, float* dst2, float* dst3, float coef[4][HRTF_TAPS], int numFrames) {
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FIR_1x4_SSE(src, dst0, dst1, dst2, dst3, coef, numFrames);
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static bool cpuSupportsAVX() {
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return false;
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}
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static bool cpuSupportsAVX2() {
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return false;
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}
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#endif
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//
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// Runtime CPU dispatch
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//
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typedef void FIR_1x4_t(float* src, float* dst0, float* dst1, float* dst2, float* dst3, float coef[4][HRTF_TAPS], int numFrames);
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FIR_1x4_t FIR_1x4_AVX; // separate compilation with VEX-encoding enabled
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static void FIR_1x4(float* src, float* dst0, float* dst1, float* dst2, float* dst3, float coef[4][HRTF_TAPS], int numFrames) {
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static FIR_1x4_t* f = cpuSupportsAVX() ? FIR_1x4_AVX : FIR_1x4_SSE; // init on first call
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(*f)(src, dst0, dst1, dst2, dst3, coef, numFrames); // dispatch
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}
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// 4 channel planar to interleaved
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static void interleave_4x4(float* src0, float* src1, float* src2, float* src3, float* dst, int numFrames) {
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96
libraries/audio/src/avx/AudioHRTF_avx.cpp
Normal file
96
libraries/audio/src/avx/AudioHRTF_avx.cpp
Normal file
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@ -0,0 +1,96 @@
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//
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// AudioHRTF_avx.cpp
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// libraries/audio/src/avx
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//
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// Created by Ken Cooke on 1/17/16.
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// Copyright 2016 High Fidelity, Inc.
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//
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// Distributed under the Apache License, Version 2.0.
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// See the accompanying file LICENSE or http://www.apache.org/licenses/LICENSE-2.0.html
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//
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#if defined(_M_IX86) || defined(_M_X64) || defined(__i386__) || defined(__x86_64__)
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#include <assert.h>
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#include <immintrin.h>
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#include "../AudioHRTF.h"
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#ifndef __AVX__
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#error Must be compiled with /arch:AVX or -mavx.
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#endif
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// 1 channel input, 4 channel output
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void FIR_1x4_AVX(float* src, float* dst0, float* dst1, float* dst2, float* dst3, float coef[4][HRTF_TAPS], int numFrames) {
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float* coef0 = coef[0] + HRTF_TAPS - 1; // process backwards
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float* coef1 = coef[1] + HRTF_TAPS - 1;
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float* coef2 = coef[2] + HRTF_TAPS - 1;
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float* coef3 = coef[3] + HRTF_TAPS - 1;
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assert(numFrames % 8 == 0);
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for (int i = 0; i < numFrames; i += 8) {
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__m256 acc0 = _mm256_setzero_ps();
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__m256 acc1 = _mm256_setzero_ps();
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__m256 acc2 = _mm256_setzero_ps();
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__m256 acc3 = _mm256_setzero_ps();
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float* ps = &src[i - HRTF_TAPS + 1]; // process forwards
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assert(HRTF_TAPS % 8 == 0);
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for (int k = 0; k < HRTF_TAPS; k += 8) {
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acc0 = _mm256_add_ps(acc0, _mm256_mul_ps(_mm256_broadcast_ss(&coef0[-k-0]), _mm256_loadu_ps(&ps[k+0])));
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acc1 = _mm256_add_ps(acc1, _mm256_mul_ps(_mm256_broadcast_ss(&coef1[-k-0]), _mm256_loadu_ps(&ps[k+0])));
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acc2 = _mm256_add_ps(acc2, _mm256_mul_ps(_mm256_broadcast_ss(&coef2[-k-0]), _mm256_loadu_ps(&ps[k+0])));
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acc3 = _mm256_add_ps(acc3, _mm256_mul_ps(_mm256_broadcast_ss(&coef3[-k-0]), _mm256_loadu_ps(&ps[k+0])));
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acc0 = _mm256_add_ps(acc0, _mm256_mul_ps(_mm256_broadcast_ss(&coef0[-k-1]), _mm256_loadu_ps(&ps[k+1])));
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acc1 = _mm256_add_ps(acc1, _mm256_mul_ps(_mm256_broadcast_ss(&coef1[-k-1]), _mm256_loadu_ps(&ps[k+1])));
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acc2 = _mm256_add_ps(acc2, _mm256_mul_ps(_mm256_broadcast_ss(&coef2[-k-1]), _mm256_loadu_ps(&ps[k+1])));
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acc3 = _mm256_add_ps(acc3, _mm256_mul_ps(_mm256_broadcast_ss(&coef3[-k-1]), _mm256_loadu_ps(&ps[k+1])));
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acc0 = _mm256_add_ps(acc0, _mm256_mul_ps(_mm256_broadcast_ss(&coef0[-k-2]), _mm256_loadu_ps(&ps[k+2])));
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acc1 = _mm256_add_ps(acc1, _mm256_mul_ps(_mm256_broadcast_ss(&coef1[-k-2]), _mm256_loadu_ps(&ps[k+2])));
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acc2 = _mm256_add_ps(acc2, _mm256_mul_ps(_mm256_broadcast_ss(&coef2[-k-2]), _mm256_loadu_ps(&ps[k+2])));
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acc3 = _mm256_add_ps(acc3, _mm256_mul_ps(_mm256_broadcast_ss(&coef3[-k-2]), _mm256_loadu_ps(&ps[k+2])));
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acc0 = _mm256_add_ps(acc0, _mm256_mul_ps(_mm256_broadcast_ss(&coef0[-k-3]), _mm256_loadu_ps(&ps[k+3])));
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acc1 = _mm256_add_ps(acc1, _mm256_mul_ps(_mm256_broadcast_ss(&coef1[-k-3]), _mm256_loadu_ps(&ps[k+3])));
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acc2 = _mm256_add_ps(acc2, _mm256_mul_ps(_mm256_broadcast_ss(&coef2[-k-3]), _mm256_loadu_ps(&ps[k+3])));
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acc3 = _mm256_add_ps(acc3, _mm256_mul_ps(_mm256_broadcast_ss(&coef3[-k-3]), _mm256_loadu_ps(&ps[k+3])));
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acc0 = _mm256_add_ps(acc0, _mm256_mul_ps(_mm256_broadcast_ss(&coef0[-k-4]), _mm256_loadu_ps(&ps[k+4])));
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acc1 = _mm256_add_ps(acc1, _mm256_mul_ps(_mm256_broadcast_ss(&coef1[-k-4]), _mm256_loadu_ps(&ps[k+4])));
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acc2 = _mm256_add_ps(acc2, _mm256_mul_ps(_mm256_broadcast_ss(&coef2[-k-4]), _mm256_loadu_ps(&ps[k+4])));
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acc3 = _mm256_add_ps(acc3, _mm256_mul_ps(_mm256_broadcast_ss(&coef3[-k-4]), _mm256_loadu_ps(&ps[k+4])));
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acc0 = _mm256_add_ps(acc0, _mm256_mul_ps(_mm256_broadcast_ss(&coef0[-k-5]), _mm256_loadu_ps(&ps[k+5])));
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acc1 = _mm256_add_ps(acc1, _mm256_mul_ps(_mm256_broadcast_ss(&coef1[-k-5]), _mm256_loadu_ps(&ps[k+5])));
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acc2 = _mm256_add_ps(acc2, _mm256_mul_ps(_mm256_broadcast_ss(&coef2[-k-5]), _mm256_loadu_ps(&ps[k+5])));
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acc3 = _mm256_add_ps(acc3, _mm256_mul_ps(_mm256_broadcast_ss(&coef3[-k-5]), _mm256_loadu_ps(&ps[k+5])));
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acc0 = _mm256_add_ps(acc0, _mm256_mul_ps(_mm256_broadcast_ss(&coef0[-k-6]), _mm256_loadu_ps(&ps[k+6])));
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acc1 = _mm256_add_ps(acc1, _mm256_mul_ps(_mm256_broadcast_ss(&coef1[-k-6]), _mm256_loadu_ps(&ps[k+6])));
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acc2 = _mm256_add_ps(acc2, _mm256_mul_ps(_mm256_broadcast_ss(&coef2[-k-6]), _mm256_loadu_ps(&ps[k+6])));
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acc3 = _mm256_add_ps(acc3, _mm256_mul_ps(_mm256_broadcast_ss(&coef3[-k-6]), _mm256_loadu_ps(&ps[k+6])));
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acc0 = _mm256_add_ps(acc0, _mm256_mul_ps(_mm256_broadcast_ss(&coef0[-k-7]), _mm256_loadu_ps(&ps[k+7])));
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acc1 = _mm256_add_ps(acc1, _mm256_mul_ps(_mm256_broadcast_ss(&coef1[-k-7]), _mm256_loadu_ps(&ps[k+7])));
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acc2 = _mm256_add_ps(acc2, _mm256_mul_ps(_mm256_broadcast_ss(&coef2[-k-7]), _mm256_loadu_ps(&ps[k+7])));
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acc3 = _mm256_add_ps(acc3, _mm256_mul_ps(_mm256_broadcast_ss(&coef3[-k-7]), _mm256_loadu_ps(&ps[k+7])));
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}
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_mm256_storeu_ps(&dst0[i], acc0);
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_mm256_storeu_ps(&dst1[i], acc1);
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_mm256_storeu_ps(&dst2[i], acc2);
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_mm256_storeu_ps(&dst3[i], acc3);
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}
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_mm256_zeroupper();
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||||
}
|
||||
|
||||
#endif
|
||||
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Reference in a new issue